Warning, cross-references for /kernel/drivers/usb/rtl818x.h need to be fixed.
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
0020
0021
0022
0023
0024
0025
0026
0027
0028
0029
0030
0031
0032
0033
0034
0035 #ifndef _RTL818X_H_
0036 #define _RTL818X_H_
0037
0038 #include <kernel.h>
0039
0040 struct rtl818x_csr {
0041 u8 MAC[6];
0042 u8 reserved_0[2];
0043 __le32 MAR[2];
0044 u8 RX_FIFO_COUNT;
0045 u8 reserved_1;
0046 u8 TX_FIFO_COUNT;
0047 u8 BQREQ;
0048 u8 reserved_2[4];
0049 __le32 TSFT[2];
0050 __le32 TLPDA;
0051 __le32 TNPDA;
0052 __le32 THPDA;
0053 __le16 BRSR;
0054 u8 BSSID[6];
0055 u8 RESP_RATE;
0056 u8 EIFS;
0057 u8 reserved_3[1];
0058 u8 CMD;
0059 #define RTL818X_CMD_TX_ENABLE (1 << 2)
0060 #define RTL818X_CMD_RX_ENABLE (1 << 3)
0061 #define RTL818X_CMD_RESET (1 << 4)
0062 u8 reserved_4[4];
0063 __le16 INT_MASK;
0064 __le16 INT_STATUS;
0065 #define RTL818X_INT_RX_OK (1 << 0)
0066 #define RTL818X_INT_RX_ERR (1 << 1)
0067 #define RTL818X_INT_TXL_OK (1 << 2)
0068 #define RTL818X_INT_TXL_ERR (1 << 3)
0069 #define RTL818X_INT_RX_DU (1 << 4)
0070 #define RTL818X_INT_RX_FO (1 << 5)
0071 #define RTL818X_INT_TXN_OK (1 << 6)
0072 #define RTL818X_INT_TXN_ERR (1 << 7)
0073 #define RTL818X_INT_TXH_OK (1 << 8)
0074 #define RTL818X_INT_TXH_ERR (1 << 9)
0075 #define RTL818X_INT_TXB_OK (1 << 10)
0076 #define RTL818X_INT_TXB_ERR (1 << 11)
0077 #define RTL818X_INT_ATIM (1 << 12)
0078 #define RTL818X_INT_BEACON (1 << 13)
0079 #define RTL818X_INT_TIME_OUT (1 << 14)
0080 #define RTL818X_INT_TX_FO (1 << 15)
0081 __le32 TX_CONF;
0082 #define RTL818X_TX_CONF_LOOPBACK_MAC (1 << 17)
0083 #define RTL818X_TX_CONF_LOOPBACK_CONT (3 << 17)
0084 #define RTL818X_TX_CONF_NO_ICV (1 << 19)
0085 #define RTL818X_TX_CONF_DISCW (1 << 20)
0086 #define RTL818X_TX_CONF_SAT_HWPLCP (1 << 24)
0087 #define RTL818X_TX_CONF_R8180_ABCD (2 << 25)
0088 #define RTL818X_TX_CONF_R8180_F (3 << 25)
0089 #define RTL818X_TX_CONF_R8185_ABC (4 << 25)
0090 #define RTL818X_TX_CONF_R8185_D (5 << 25)
0091 #define RTL818X_TX_CONF_R8187vD (5 << 25)
0092 #define RTL818X_TX_CONF_R8187vD_B (6 << 25)
0093 #define RTL818X_TX_CONF_HWVER_MASK (7 << 25)
0094 #define RTL818X_TX_CONF_DISREQQSIZE (1 << 28)
0095 #define RTL818X_TX_CONF_PROBE_DTS (1 << 29)
0096 #define RTL818X_TX_CONF_HW_SEQNUM (1 << 30)
0097 #define RTL818X_TX_CONF_CW_MIN (1 << 31)
0098 __le32 RX_CONF;
0099 #define RTL818X_RX_CONF_MONITOR (1 << 0)
0100 #define RTL818X_RX_CONF_NICMAC (1 << 1)
0101 #define RTL818X_RX_CONF_MULTICAST (1 << 2)
0102 #define RTL818X_RX_CONF_BROADCAST (1 << 3)
0103 #define RTL818X_RX_CONF_FCS (1 << 5)
0104 #define RTL818X_RX_CONF_DATA (1 << 18)
0105 #define RTL818X_RX_CONF_CTRL (1 << 19)
0106 #define RTL818X_RX_CONF_MGMT (1 << 20)
0107 #define RTL818X_RX_CONF_ADDR3 (1 << 21)
0108 #define RTL818X_RX_CONF_PM (1 << 22)
0109 #define RTL818X_RX_CONF_BSSID (1 << 23)
0110 #define RTL818X_RX_CONF_RX_AUTORESETPHY (1 << 28)
0111 #define RTL818X_RX_CONF_CSDM1 (1 << 29)
0112 #define RTL818X_RX_CONF_CSDM2 (1 << 30)
0113 #define RTL818X_RX_CONF_ONLYERLPKT (1 << 31)
0114 __le32 INT_TIMEOUT;
0115 __le32 TBDA;
0116 u8 EEPROM_CMD;
0117 #define RTL818X_EEPROM_CMD_READ (1 << 0)
0118 #define RTL818X_EEPROM_CMD_WRITE (1 << 1)
0119 #define RTL818X_EEPROM_CMD_CK (1 << 2)
0120 #define RTL818X_EEPROM_CMD_CS (1 << 3)
0121 #define RTL818X_EEPROM_CMD_NORMAL (0 << 6)
0122 #define RTL818X_EEPROM_CMD_LOAD (1 << 6)
0123 #define RTL818X_EEPROM_CMD_PROGRAM (2 << 6)
0124 #define RTL818X_EEPROM_CMD_CONFIG (3 << 6)
0125 u8 CONFIG0;
0126 u8 CONFIG1;
0127 u8 CONFIG2;
0128 #define RTL818X_CONFIG2_ANTENNA_DIV (1 << 6)
0129 __le32 ANAPARAM;
0130 u8 MSR;
0131 #define RTL818X_MSR_NO_LINK (0 << 2)
0132 #define RTL818X_MSR_ADHOC (1 << 2)
0133 #define RTL818X_MSR_INFRA (2 << 2)
0134 #define RTL818X_MSR_MASTER (3 << 2)
0135 #define RTL818X_MSR_ENEDCA (4 << 2)
0136 u8 CONFIG3;
0137 #define RTL818X_CONFIG3_ANAPARAM_WRITE (1 << 6)
0138 #define RTL818X_CONFIG3_GNT_SELECT (1 << 7)
0139 u8 CONFIG4;
0140 #define RTL818X_CONFIG4_POWEROFF (1 << 6)
0141 #define RTL818X_CONFIG4_VCOOFF (1 << 7)
0142 u8 TESTR;
0143 u8 reserved_9[2];
0144 u8 PGSELECT;
0145 u8 SECURITY;
0146 __le32 ANAPARAM2;
0147 u8 reserved_10[12];
0148 __le16 BEACON_INTERVAL;
0149 __le16 ATIM_WND;
0150 __le16 BEACON_INTERVAL_TIME;
0151 __le16 ATIMTR_INTERVAL;
0152 u8 PHY_DELAY;
0153 u8 CARRIER_SENSE_COUNTER;
0154 u8 reserved_11[2];
0155 u8 PHY[4];
0156 __le16 RFPinsOutput;
0157 __le16 RFPinsEnable;
0158 __le16 RFPinsSelect;
0159 __le16 RFPinsInput;
0160 __le32 RF_PARA;
0161 __le32 RF_TIMING;
0162 u8 GP_ENABLE;
0163 u8 GPIO0;
0164 u8 GPIO1;
0165 u8 reserved_12;
0166 __le32 HSSI_PARA;
0167 u8 reserved_13[4];
0168 u8 TX_AGC_CTL;
0169 #define RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT (1 << 0)
0170 #define RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT (1 << 1)
0171 #define RTL818X_TX_AGC_CTL_FEEDBACK_ANT (1 << 2)
0172 u8 TX_GAIN_CCK;
0173 u8 TX_GAIN_OFDM;
0174 u8 TX_ANTENNA;
0175 u8 reserved_14[16];
0176 u8 WPA_CONF;
0177 u8 reserved_15[3];
0178 u8 SIFS;
0179 u8 DIFS;
0180 u8 SLOT;
0181 u8 reserved_16[5];
0182 u8 CW_CONF;
0183 #define RTL818X_CW_CONF_PERPACKET_CW_SHIFT (1 << 0)
0184 #define RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT (1 << 1)
0185 u8 CW_VAL;
0186 u8 RATE_FALLBACK;
0187 #define RTL818X_RATE_FALLBACK_ENABLE (1 << 7)
0188 u8 ACM_CONTROL;
0189 u8 reserved_17[24];
0190 u8 CONFIG5;
0191 u8 TX_DMA_POLLING;
0192 u8 reserved_18[2];
0193 __le16 CWR;
0194 u8 RETRY_CTR;
0195 u8 reserved_19[3];
0196 __le16 INT_MIG;
0197
0198 #define RTL818X_R8187B_B 0
0199 #define RTL818X_R8187B_D 1
0200 #define RTL818X_R8187B_E 2
0201 __le32 RDSAR;
0202 __le16 TID_AC_MAP;
0203 u8 reserved_20[4];
0204 u8 ANAPARAM3;
0205 u8 reserved_21[5];
0206 __le16 FEMR;
0207 u8 reserved_22[4];
0208 __le16 TALLY_CNT;
0209 u8 TALLY_SEL;
0210 } PACKED;
0211
0212 struct ieee80211_conf;
0213 struct ieee80211_bss_conf;
0214
0215 struct rtl818x_rf_ops {
0216 char *name;
0217 void (*init)(void);
0218 void (*stop)(void);
0219 void (*set_chan)(struct ieee80211_conf *);
0220 void (*conf_erp)(struct ieee80211_bss_conf *);
0221 };
0222
0223
0224
0225
0226
0227
0228
0229
0230
0231
0232
0233
0234
0235 enum rtl818x_tx_desc_flags {
0236 RTL818X_TX_DESC_FLAG_NO_ENC = (1 << 15),
0237 RTL818X_TX_DESC_FLAG_TX_OK = (1 << 15),
0238 RTL818X_TX_DESC_FLAG_SPLCP = (1 << 16),
0239 RTL818X_TX_DESC_FLAG_RX_UNDER = (1 << 16),
0240 RTL818X_TX_DESC_FLAG_MOREFRAG = (1 << 17),
0241 RTL818X_TX_DESC_FLAG_CTS = (1 << 18),
0242 RTL818X_TX_DESC_FLAG_RTS = (1 << 23),
0243 RTL818X_TX_DESC_FLAG_LS = (1 << 28),
0244 RTL818X_TX_DESC_FLAG_FS = (1 << 29),
0245 RTL818X_TX_DESC_FLAG_DMA = (1 << 30),
0246 RTL818X_TX_DESC_FLAG_OWN = (1 << 31)
0247 };
0248
0249 enum rtl818x_rx_desc_flags {
0250 RTL818X_RX_DESC_FLAG_ICV_ERR = (1 << 12),
0251 RTL818X_RX_DESC_FLAG_CRC32_ERR = (1 << 13),
0252 RTL818X_RX_DESC_FLAG_PM = (1 << 14),
0253 RTL818X_RX_DESC_FLAG_RX_ERR = (1 << 15),
0254 RTL818X_RX_DESC_FLAG_BCAST = (1 << 16),
0255 RTL818X_RX_DESC_FLAG_PAM = (1 << 17),
0256 RTL818X_RX_DESC_FLAG_MCAST = (1 << 18),
0257 RTL818X_RX_DESC_FLAG_QOS = (1 << 19),
0258 RTL818X_RX_DESC_FLAG_TRSW = (1 << 24),
0259 RTL818X_RX_DESC_FLAG_SPLCP = (1 << 25),
0260 RTL818X_RX_DESC_FLAG_FOF = (1 << 26),
0261 RTL818X_RX_DESC_FLAG_DMA_FAIL = (1 << 27),
0262 RTL818X_RX_DESC_FLAG_LS = (1 << 28),
0263 RTL818X_RX_DESC_FLAG_FS = (1 << 29),
0264 RTL818X_RX_DESC_FLAG_EOR = (1 << 30),
0265 RTL818X_RX_DESC_FLAG_OWN = (1 << 31)
0266 };
0267
0268 #endif
0269
0270
0271
0272
0273
0274
0275
0276
0277
0278
0279